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Subject: Hot Chips Advance program  flyer info - long form
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========================================
Sunday August 16
========================================
Morning Tutorial:

Intellectual Property Law as Applied to the Computer and Electronics Industries

Margaret Jane Radin
William Benjamin Scott & Luna M. Scott Professor of Law
Stanford Law School

The tutorial will outline the basics of the traditional forms of legal
protection of intellectual property (patents, trademarks, copyrights and
trade secrets) and describe some of the issues posed by developments in
information technology and the global networked environment.  We will
consider how intellectual property protection is established, how it
functions in practice, and what happens when intellectual property rights
are infringed.  We will look at not only the different principles of each
form of protection, but also how their boundaries are delineated, and where
those boundaries are blurred  (e.g. copyright vs. patenting of software.)
We will also consider how economic factors relate to the extent of
intellectual property protection, and we will consider the significance of
non-property (the public domain) for the competitive marketplace and for
future invention.

========================================
Afternoon Tutorial

Fast CPUs Are Good ... but Fast I/O is Better

Speaker: Silicon Graphics Peripherals Team

Fast microprocessors need large storage and fast I/O.  This tutorial
will include overviews of various I/O technologies, how they fit togehter,
and where they seem to be going, including peripheral connections, disks,
removables, and performance issues.
    1) Overview of the various technologies, how they fit together,
        and where they are going.
    2) Survey of peripheral connections, e.g. SCSI, FibreChannel, 1394
    3) Disk technologies
	History, specifications, technologies, capacities, bandwidths,
latencies
	Fixed and removables
	Near-term futures
    4) CDROMs, DVD, etc
    5) Tapes
    6) Real problems or "your mileage may vary"
	Peak numbers vs. real numbers
	real case studies of extreme I/O demands

========================================
Monday August 17
9:00-9:15	Welcome, Opening remarks (General and Program Chairs)

========================================
9:15-10:45 Session 1: High Performance Processors (part 1) John Mashey, chair


The Alpha 21264 Microprocessor: Out-Of-Order Execution at 600 Mhz
	R. E. Kessler,Digital Equipment Corporation
UltraSPARC-III: A 600 MHz 64-bit Superscalar Processor for 1000-way
Scalable Systems
	Gary Lauterbach, Sun Microsystems, Inc.
Techniques for Mitigating Memory Latency in the PA-8500 Processor
	David Johnson, Hewlett-Packard

10:45-11:15 Break
===================================================
11:15-12:15 Session 2: Embedded and Embeddable Processors	Kazuaki
Murakami, chair

The M32Rx/D - A Single Chip Microcontroller With a 4MB Internal DRAM
	Toru Shimizu, Mitsubishi Electric Corporation
Genesis microprocessor
	Jack Choquette, SandCraft Inc.

12:15-1:30 Lunch
===================================================
1:30-2:15 Session 3: Monica Lam chair
    Keynote: Greg Papadopoulos, Chief Technology Officer, Sun Microsystems

2:15-2:30 Short break

===================================================
2:30-4:00   Session 4:Specialized Chips	Alan Smith ,chair

Designing a Single Chip Chess Grandmaster While Knowing Nothing about Chess
	Feng-hsiung Hsu, IBM T. J. Watson Research Center
An Encryption Accelerator and Coprocessor
	Mark Birman, Hi/fn
The EMU10K1 Digital Audio Processor
	Tom Savell	E-mu Systems, Inc.

4:00-4:30 Break

========================================
4:30-6:00   Session 5:High Performance Processors  (part 2)	Marc
Tremblay ,chair

IBM S/390 G5 Microprocessor
	Timothy J. Slegel, Robert M. Averill III, Mark A. Check,
	Bruce C. Giamei, Barry W. Krumm, Christopher A. Krygowski, Wen H. Li,
	John S. Liptay, John D. MacDougall, Thomas J. McPherson,
	Jennifer A. Navarro, Eric M. Schwarz, Kevin Shum, and Charles F. Webb,
	IBM Corporation
A CMOS Vector Processor with Custom Streaming Cache
	Greg Faanes, Cray Research
AltiVec(tm) Technology:  Accelerating Media Processing Across the Spectrum
	Keith Diefendorff*, Pradeep Dubey**, Ron Hochsprung*, Brett Olsson**,
	Hunter Scales*** (*Apple Computer, **IBM, ***Motorola)

========================================

6:00-7:30   Dinner
7:30-9:00   Session 6: Panel: Can Microsoft be Stopped?	John Wharton, chair
	Panellists: TBA

Microsoft's hold on the industry keeps growing. Are there any fronts --
business, technology, content  or legal -- where the company may be
vulnerable?

========================================
Tuesday August 18
========================================
9:00-10:30  Session 7: MPEG and Digital TV	Gert Slavenburg, chair

A Single-chip MPEG2 MP@ML Video Encoder with Multi-chip Configuration for a
Single-board MP@HL Encoder
	Toshihiro Minami, Toshio Kondo, Koyo Nitta, Kazuhito Suguri,
	Mitsuo Ikeda, Takeshi Yoshitome, Hiroshi Watanabe, Hiroe Iwasaki,
	Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Eiichi Yamagishi,
	Takuro Takahashi, Koichi Tadaishi, Yutaka Tashiro, Naoki Kobayashi,
	Tsuneo Okubo, Takeshi Ogura, Ryota Kasai, NTT
TM2000: A Single-Chip DTV Media Processor from Trimedia
	Selliah Rathnam and Gerrit Slavenburg, Trimedia Product Group
A New Chipset for DTV Compliant with ATSC Standard
	Hee-Bok Park, Cheol-Kyo Suh, Seung-Jong Choi, Dong-Il Han,
	Jin-Gyeong Kim, Dae-Hyup Ko, Jong-Seok Park,  LG Electronics Inc.

10:30-11:00 Break

===================================================
11:00-12:30 Session 8: General Puropose Processors with Integrated Media
Support	 Kunle Olukotun, chair

A High Performance x86 Processor with Integrated 3D Graphics
	Rich Perego, Cyrix Corporation
Novel Multimedia Instruction Capabilities in VLIW Media Processors
	J.T.J. van Eijndhoven,  Philips Research Laboratories Eindhoven,
 F. W. Sijstermans, Eindhoven University of Technology
SA-1500: A 300 MHz RISC CPU with Attached Media Processor
	Prashant P. Gandhi, Intel Corp.

12:30-2:00 Lunch

===================================================
2:00-4:00   Session 9: Graphics Accelerators	Bill Dally, chair

Intel i740 Graphics Accelerator
	Tom Piazza, Intel Corp.
Blitzen: Lightning Speed 3D Geometry Accelerator
	Alan Krech, Hewlett-Packard
Neon: A (Big) (Fast) Single-Chip 3D Graphics Accelerator
	Joel McCormack, Robert McNamara, Christopher Gianos, and Norman
Jouppi, Digital Equipment Corporation;
	Larry Seiler and Ken Correll, Mitsubishi Electric Research Laboratory
VelaTX - Innovative 3D Architecture Coupled with Embedded DRAM Architecture
	Michael C. Lewis, Joseph C. Del Rio, Stellar Semiconductor, Inc.

4:00-4:30 Break

===================================================
4:30-5:30   Session 10: High Performance PC Processors	Ruby Lee, chair

AMD 3DNow! Technology and the K6-2 Microprocessor
	Stuart Oberman, Fred Weber, Norbert Juffa, Greg Favor, AMD
TBA

5:30-5:40 Closing Remarks
===================================================
Organizing Committee                    Program Committee
--------------------                    -----------------
Chair                                   Program   Co-Chairs
  Allen Baum          Compaq             John Wawrzynek    U.C. Berkeley
Vice Chair                               Norm Jouppi       Compaq
  S. Diane Smith      Santa Clara Univ
Finance                                 Program Committee
  Lily Jow            Compaq              Bill Dally	   Stanford Univ.
Publicity                                 Monica Lam	   Stanford Univ.
  Cynthia Garb        GHI                 Ruby Lee	   Hewlett Packard
Registration                              John Mashey	   Silicon Graphics
  Richard Karpinski   Maqc                Jack Mills	   Intel
Publications                              Alan Smith	   U.C. Berkeley
  David Moberly       Hewlett-Packard     Kazuaki Murakami Kyushu Univ.
Local Arrangements                        Kunle Olukotun   Stanford Univ.
  Amr Zaky            Silicon Graphics    Gert Slavenburg  Philips Research
  Bob Lashley         Sun Microsystems    Marc Tremblay	   Sun Microsystems
  Dave Gallaher       SFSFC               John Wharton	   Applications
Research
  Alan Alcorn         Interval Research
At  Large
  Bob Stewart         SRE
  Martin Freeman      Phillips Research
  Slava Mach          SCVCS Chair
  Carey Kornfeld      Kdesign
-----------------
 Location:
        Hot Chips and Hot Interconnects will be held in Meorial Auditorium
	on the campus of Stanford University, Palo Alto, California,
	approximately 24 miles from San Francisco airport,
	and 15 miles from San Jose airport.

Driving Directions:
        From San Francisco, take highway 101 south
        From San Jose,      take highway 101 north
        Take the Embarcadero exit west and go 3 miles until you enter
                the Stanford campus.
        Signs will then point you to conference parking.

        Maps of Stanford campus and surrounding areas are available at
	http://www.stanford.edu/home/visitors/maps.html
        Mass transit information is available at http://www.transitinfo.org/

Weather:
        Mid-August is typically in the 80s(F) and sunny during the day.
        Nights are much cooler; a light jacket or sweater is appropriate.

Housing:
        Hotel information for the area is available at
	http://soi.stanford.edu/general/meetings/hotel.html or
	http://www.stanford.edu/dept/hds/chs/general/hotel.html or
	http://www-csli.stanford.edu/~clrf/hotel.html
        The closest hotel is the Palo Alto Holiday Inn.
        Reservations well in advance are advised.
        On-campus housing is also available in student residences, and can
        be arranged by contacting the Stanford Conference Office at
        (650) 725-1429 or tcup@leland.stanford.edu.
        Rates are $45.00 per night for single occupancy
        and       $32.00 per night per person for shared occupancy.

Conference registration includes:
       € attendance
       € one copy of notes
       € two luncheons
       € coffee breaks
       € Sunday afternoon wine and cheese reception (Hot Chips only)
       € Thursday (HotInterconnects)/Monday (HotChips) evening reception
       € parking
Tutorial registration includes:
       € attendance for one (HotInterconnects) or both (HotChips) tutorials
       € one copy of notes
       € luncheon
       € coffee breaks
       € Sunday afternoon wine and cheese reception (Hot Chips only)
       € parking

Registration can be done through our secure web server at http://hot.org.
Web registration is preferred, but the form below can also be mailed to:
12340 Indian Trail Rd., Los Gatos, CA 95033-8241 or faxed to (408) 867-5831.
We accept Visa or Mastercard, or checks if registering by mail.
Registrants will be sent a confirmation by email.
Refunds due to cancellations will only be made prior to August 6,
and will incur a service charge of $25.
Students must supply a copy of their school's ID card.

For answers to questions about registration, contact us by email at
registration@hoti.org or registration@hotchips.org.
For other information, contact us by email at info@hoti.org or
info@hotchips.org.
***********************************************
* Allen J. Baum           tel. (650)853-6626  *
* Compaq Computers        fax. (650)853-6513  *
* 181 Lytton Ave.                             *
* Palo Alto, CA 94301      abaum@pa.dec.com   *
***********************************************


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