[Prev][Next][Index]

Re: CNN - IBM chip breaks memory bottleneck



I don't think you want the application/compiler explicitly moving data
in and out.  You can maybe do something like virtual memory with it, but
then isn't it just a software controlled cache?  Also, remember access
time to a memory structure is a function of its size, so you may still
want a smaller cache for faster access time, and the ability to provide
multiple ports for a superscalar processor.

	-alvy

Mithuna Thottethodi wrote:
> 
> 32MB SRAM on the same chip as a micro processor!! Do we need caches any
> more?
> 
> <quote>
>         The technology giant has created a microprocessor that
>         combines computation abilities with a vastly increased
>         high-speed memory -- up to 32 megabytes -- on a single
>         chip. Most of today's processors must frequently exchange
>         data with separate memory chips, creating a performance
>         bottleneck. The application-specific integrated circuit, or
>         ASIC, will use copper circuitry as small as 0.15 micron (less
>         than 1/600th the width of a human hair), creating a faster
>         chip.
> </quote>
> 
> Full report is available at
> http://www.cnn.com/TECH/computing/9902/23/ibm.memory.lat/

-- 
-----------------------------------------------------------------------
Alvin R. Lebeck                         Office  D304 LSRC
Assistant Professor                     Phone   (919) 660-6551
Dept. of Computer Science               FAX     (919) 660-6519
Box 90129                               e-mail: alvy@cs.duke.edu
Duke University                         http://www.cs.duke.edu/~alvy
Durham, NC 27708-0129
-----------------------------------------------------------------------

Reference(s):