Fred Bower

Until this dog learns some new tricks, hand-editted static content will be all that one gets by visiting this URL. Visit as often as you like, but expect changes on a human time scale.

Quick Links

• Running SPEC2000 Benchmarks with SimpleScalar

Biography and Academic Background

I am presently a part-time Ph.D. candidate in the Department of Computer Science at Duke University. I am part-time because I have a day job at IBM in the Systems and Technology Group xSeries Development. Conveniently, they are geographically proximate, enabling the duality of my existence.

My academic career chronicle thus far looks like this:

• December, 2006: Enter into dissertation research phase
• August, 2003: Begin part-time Ph.D. study at Duke in Computer Science
• September, 2002: Move to Durham, North Carolina courtesy of IBM
• November, 1999: Move into diagnostic development for high-end Intel-based servers within IBM
• October, 1999: Sequent Computer Systems purchased by IBM
• September, 1999: Complete non-thesis M.S. in Computer Science and Engineering with focus on Systems Software at Oregon Graduate Institute of Science and Technology
• September, 1997: Begin part-time M.S. study at Oregon Graduate Institute
• May, 1996: Join Sequent Computer Systems as full-time Software Test Engineer in Beaverton, Oregon
• May, 1996: Complete B.S. degrees in Mechanical Engineering and Computer Science at Oregon State University

Current Research Interests

My past research interests involved fault-tolerant computing principles. Currently, In that work, I explored architectural extensions to enable fault tolerance and autonomic self-repair.

Presently, my architecture interests are centered around the design of future multi-core architectures for throughput-centric computing.

Curriculum Vitae

Publications

• Fred A. Bower, Daniel J. Sorin, and Landon P. Cox. "The Impact of Dynamically Heterogeneous Multicore Processors on Thread Scheduling." IEEE MICRO, Vol. 28, No. 3, May/June 2008. <Paper>
• Fred A. Bower, Daniel J. Sorin, and Sule Ozev. "Online Diagnosis of Hard Faults in Microprocessors." ACM Transactions on Architecture and Code Optimization (TACO), Vol. 4, Issue 2, June 2007.
  <Paper>
• Fred A. Bower, Derek Hower, Mahmut Yilmaz, Daniel J. Sorin, and Sule Ozev. "Applying Architectural Vulnerability Analysis to Hard Faults in the Microprocessor." ACM SIGMETRICS/Performance 2006, June 2006.
  <Paper> <Poster Presentation>
• Fred A. Bower, Daniel J. Sorin, and Sule Ozev. "A Mechanism for Online Diagnosis of Hard Faults in Microprocessors." 38th International Symposium on Microarchitecture (MICRO-38), November 2005.
  <Paper> <Slides>
• Fred A. Bower, Sule Ozev, and Daniel J. Sorin. "Autonomic Microprocessor Execution via Self-Repairing Arrays." IEEE Transactions on Dependable and Secure Computing, Vol. 2, No. 4, October-December 2005.
  <Paper>
• Fred A. Bower, Paul G. Shealy, Sule Ozev, and Daniel J. Sorin. "Tolerating Hard Faults in Microprocessor Array Structures." International Conference on Dependable Systems and Networks (DSN), June 2004.
  <Paper> <Slides>
• Fred Bower. "System Data Collection and Problem Analysis in the Dynamic System Analysis Project." IBM Conference on Server & Storage Development to Support Autonomic Computing, October 2003.
  Not cleared for external publication by IBM at this time
  <Product Website>

Workshop Talks

• Fred Bower. "Coping with the Limitations of Machine Learning in Autonomic Problem Determination." IBM Second Proactive Problem Prediction, Avoidance and Diagnosis Conference: Techniques, Algorithms and Best Practices for Computer Systems, April 2004.
  <Slides>

Invited Talks

• Fred Bower. ""Emerging Techniques for Protecting the Microprocessor Core from Hard Faults." The Fourth Symposium on Program acceleration by Application-driven and architecture-driven Code Transformations, September 2004.
  <Slides>

Technical Reports

• Fred Bower. "An Evaluation of the Security Features of the WebStore Electronic Commerce Suite." Originally published to the Bugtraq mailing list, April 1999.
  <Paper>

Patents

• Fred A. Bower, Paul G. Shealy, Sule Ozev and Daniel J. Sorin. "Self-repairing of microprocessor array structures." US 7415644.
• Fred A. Bower, David Roberts, Thomas J. Fox, Ketan K. Shah, Richard E. Harper, Tushar Fadale and Rodney H. Brown. "Identifying temporal ambiguity in an aggregated log stream." US 7380173.
• Fred A. Bower. "Cooperatively multitasking in an interrupt-free computing environment." US 7340740, CN ZL 200410030262.9.
• Fred A. Bower. "Executive Process Monitoring of Worker Processes." US 7051331.
• Fred A. Bower. "Method of launching low-priority tasks." US 7356820.

Additional patents currently pending.

Contact Information

The best way to contact me is via e-mail to: