Fifo_Loader.hlc
A driver that loads the fifo.
ldvsim man pages
OASIS Manual
fifo.hlc This is an HLC module for a
2K fifo.
Fifo_Loader.hlc
A driver that loads the fifo.
fifo.lg This is a LOGIC-III module that
generates the netlist for the fifo and the Fifo_Loader modules. Use this
as an example how to generate netlist components for your *.hlc modules.
SN74ALL.hlc HLC file with some functions
and control modules.
SN74.h Header file for SN74ALL.hlc.
makefile Example makefile for compiling
the components.
memory.hlc Examples of memory
modules.
Postscript documentation for cclock.
Acrobat documentation for cclock.
cclock.hlc A clock generator control
module. This control module can be used to drive the simulation.
It generates one phase and two phase control signals (PHI and PHI1, PHI2).
Consult the on-line documentation or the LDV manual for instruction on how
it works.