Make - A Program for Maintaining Computer Programs

Problem: Large programs are typically composed of several components, each component built in a unique way.

Example: Client and server programs share common header (.h) files, to insure that they both use the same data structures. In addition, they both use the same data link layer routines in the file dl.c.

What needs to done if we modify a .h file? dl.c? server.c If we change the file dl.c, both the client and server should be recompiled. If we only change the source file server.c, however, we would recompile only the server and not the client.

Basic features of make:

• Make allows the building of targets, single units depending on several files. Both the client and server would be a target in make.
• Each target depends on a set of dependencies, and a target includes a ``recipe'' for buidling the target.
• Targets can be either another target, or the name of a file.
• Make uses timestamps to decide when things need rebuilding. Thus, if a target is the name of the file, the target will be remade only if one or more of its dependencies has a newer timestamp.
• Updating a target consists of first checking whether the dependencies are up to date. If they are, the target does not need rebuilding.
• If any of the dependencies need rebuilding, remake the dependencies, and then rebuild the target.

Example: files client.c, server.c, frame.h, msg.h, and dl.c. Both client.c and server.c ``#includes'' msg.h. Dl.c ``#includes'' frame.h. Thus, we have the following dependencies:

client.o

depends on: client.c and msg.h

server.o

depends on: server.c and msg.h

dl.o

depends on: dl.c and frame.h

client

depends on: client.o and dl.o

server

depends on: server.o and dl.o

Thus, the Makefile might look like:

all: client server
client: client.o dl.o
        cc -g client.o dl.o -o client 
server: server.o dl.o
        cc -g server.o dl.o -o server 
client.o: client.c msg.h
        cc -c -g client.c
server.o: server.c msg.h
        cc -c -g server.c				
dl.o: dl.c frame.h
        cc -c -g dl.c

Make also assumes many defaults, for instance, that foo.o can be made from foo.c, by using the C compiler.

Better Makefile:

# variable definitions belong at the top
CFLAGS=-g
LDFLAGS=-g
all: client server
client: client.o dl.o
        cc $(LDFLAGS) client.o dl.o -o client 
server: server.o dl.o
        cc $(LDFLAGS) server.o dl.o -o server
clean:
        rm -f *.o server client	
client.o: msg.h
server.o: msg.h
dl.o: frame.h

Note: When recompiling a C file, make (by default) uses the command ``cc -c $(CFLAGS)'', and we don't have to include an explicit recipe for compiling .c files.

It is nice to use variables at the top, because it now becomes easy to change the -g to -O and recompile with the optimizer.

The clean target makes it easy to recompile everything from scratch:

[percival]:/hmwk/IPC 41 >make clean
rm -f *.o server client core
[percival]:/hmwk/IPC 43 >make
cc -g -c client.c
cc -g -c dl.c
cc -g client.o dl.o -o client
cc -g -c server.c
cc -g server.o dl.o -o server
[percival]:/hmwk/IPC 44 >touch client.c
[percival]:/hmwk/IPC 45 >make
cc -g -c client.c
cc -g client.o dl.o -o client
[percival]:/hmwk/IPC 46 >