1.
E.W. Davis and J.H.
Reif, Architecture and Operation of the BLITZEN Processing Element. 3rd International
Conference on Computing on Supercomputing, Boston, MA, May
1988. Also as D.W. Blevin, E.W. Davis and J.H. Reif, Processing Element and
Custom Chip Architecture for the BLITZEN Massively Parallel Processor, MCNC
Technical Report TR87-22, October 1987, revised June 1988. [PDF]
2.
D.W. Blevins, E.W.
Davis, R.A. Heaton and J.H. Reif, BLITZEN: A Highly Integrated Massively
Parallel Machine. 2nd Symposium on Frontiers of Massively Parallel
Computation, Fairfax, VA, October 1988. Published in Journal
of Parallel and Distributed Computing,
Vol. 8, February 1990, pp. 150-160. [PDF]
3. Royals, M., T. Markas, N. Kanopoulos, J.H. Reif and
J. Storer, On the Design and Implementation of a Lossless Data Compression and
Decompression Chip, IEEE Journal of Solid-State Circ., Vol. 28,No. 9, pp.
948-953, Sep. 1993.
4.
J.A. Storer, T.
Markas and J.H. Reif, A Massively Parallel VLSI Compression System using a
Compact Dictionary. IEEE Workshops on VLSI & Signal Processing, 1990, San Diego, CA. Published as A Massively
Parallel VLSI Design for Data Compression Using a Compact Dictionary, VLSI
Signal Processing, No. 4, 1990
(edited by H.S. Moscovitz and K. Yao and R. Jain), Chapter 32, IEEE Press,
1990, New York, NY, pp. 329-338. [PDF]
5. J.A. Storer and J.H. Reif, A Parallel Architecture
for High Speed Data Compression, 3rd Symposium on the Frontiers of Massively
Parallel Computation, College
Park, MD, October 1990, pp. 238-243. Published in Journal of Parallel and
Distributed Computation, No. 13, pp 222-227. [PDF]
6. T. Markas and J.H. Reif, Memory-Shared Parallel
Architectures for Vector Quantization Algorithms, 1992. Picture Coding Symposium,
Lusanne Switzerland, March, 1993.