1.
Peter Gacs and John
H. Reif, A Simple Three-dimensional Real-time Reliable Cellular Array. 17th
Annual ACM Symposium on Theory of Computing, Providence, RI, May 1985, pp. 388-395. [PDF]
Published in Journal of Computer and System Sciences, Vol.
36, No. 2, April 1990, pp. 125-147. [PDF]
2. Gautam Kar, Christos N. Nikolaou, and John H. Reif,
Assigning Processes to Processors: A Fault-Tolerant Approach, 14th
International Conference on Fault-Tolerant Computing, Kissimmee,
FL, June 1984, pp. 306-309. [PDF]
3.
Ravi Nair, Anni
Bruss, and John H. Reif, Linear Time Algorithms for Optimal CMOS Layout, International
Workshop on Parallel Computing and VLSI, Amalfi, Italy, May 1984; VLSI: Algorithms and Architectures, North-Holland
pub., pp. 327-338. [PDF]
4.
John H. Reif,
Efficient VLSI Fault Simulation. Computers and Mathematics with Applications, Vol 25, No. 2, Jan. 1993, pp. 15-32. [PDF]
5. L.S. Nyland and John H. Reif, An Algebraic
Technique for Generating Optimal CMOS Circuitry in Linear Time, Computers
and Mathematics with Applications Vol
31, No. 1, Jan. 1996, pp.85-108. [PDF]